A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs

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@article{Lim2016ADL, title={A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs}, author={Ji-Hoon Lim and Jun-Hyun Bae and Jaemin Jang and Hae-Kang Jung and Hyunbae Lee and Yongju Kim and Byungsub Kim and Jae-Yoon Sim and Hong-June Park}, journal={IEEE Trans. on Circuits and Systems}, year={2016}, volume={63-II}, pages={141-145} }