A DSP Architecture for High-Speed FFT in OFDM Systems

@inproceedings{Lee2002ADA,
  title={A DSP Architecture for High-Speed FFT in OFDM Systems},
  author={Jaesung Lee and Jeonghoo Lee and Myung Hoon Sunwoo and Sangman Moh and Seong Keun Oh},
  year={2002}
}
Jaesung Lee et al. 391 This paper presents digital signal processor (DSP) instructions and their data processing unit (DPU) architecture for high-speed fast Fourier transforms (FFTs) in orthogonal frequency division multiplexing (OFDM) systems. The proposed instructions jointly perform new operation flows that are more efficient than the operation flow of the multiply and accumulate (MAC) instruction on which existing DSP chips heavily depend. We further propose a DPU architecture that fully… CONTINUE READING

Citations

Publications citing this paper.
Showing 1-6 of 6 extracted citations

Phase-laser ranging system based on digital signal processing for optoelectronics theodolite application

2010 3rd International Conference on Advanced Computer Theory and Engineering(ICACTE) • 2010
View 12 Excerpts
Highly Influenced

VLSI-Oriented Architecture for Two's Complement Serial-Parallel Multiplication without Speed Penalty

2007 International Conference on Computational Science and its Applications (ICCSA 2007) • 2007

Code Acquisition in Direct Sequence Spread Spectrum Communication Systems Using an Approximate Fast Fourier Transform

2006 IEEE Ninth International Symposium on Spread Spectrum Techniques and Applications • 2006
View 2 Excerpts

Peak power reduction scheme based on subcarrier scrambling for MC-CDMA systems

Eighth IEEE International Symposium on Spread Spectrum Techniques and Applications - Programme and Book of Abstracts (IEEE Cat. No.04TH8738) • 2004

References

Publications referenced by this paper.
Showing 1-10 of 13 references

Programmable Implementations of xDSL Transceiver System,

B. R. Wiese, J. S. Chow
IEEE Comm. Mag., • 2000
View 1 Excerpt

and M

J. Glossner, J. Moreno, +4 authors U. Shvadron
Ware, “Trends in Compilable DSP Architecture,” Proc. IEEE Workshop Signal Processing Systems • 2000
View 1 Excerpt

and O

J. G. Cousin, M. Denoual, D. Saille
Sentieys, “Fast ASIP Synthesis and Power Estimation for DSP Application,” Proc. IEEE Workshop Signal Processing Systems • 2000
View 1 Excerpt

Multiple and Parallel Execution Units in Digital Signal Processors

Soohwan Ong, Myung H. Sunwoo, Manpyo Hong
Smart Cores Articles • 1999

Sunwoo, “A Fixed-Point DSP(MDSP) Chip for Portable Multimedia,

M. H. Soohwan Ong
IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, vol • 1999
View 2 Excerpts

and B

O. B. Sheva, W. Gideon
Eran, “Multiple and Parallel Execution Units in Digital Signal Processors,” Smart Cores Articles • 1999

A Fixed-Point Multimedia DSP Chip for Portable Multimedia Services,

Soohwan Ong, Myung H. Sunwoo, Manpyo Hong
Proc. IEEE Workshop on Signal Processing Systems Design and Implementation, • 1998

Similar Papers

Loading similar papers…