A Current Reuse Quadrature GPS Receiver in 0.13 $\mu$m CMOS

@article{Cheng2010ACR,
  title={A Current Reuse Quadrature GPS Receiver in 0.13 \$\mu\$m CMOS},
  author={Kuang-Wei Cheng and Karthik Natarajan and David J. Allstot},
  journal={IEEE Journal of Solid-State Circuits},
  year={2010},
  volume={45},
  pages={510-523}
}
A fully-integrated quadrature low-IF L1-band GPS receiver consumes only 6.4 mW in 0.13 μm CMOS. The RF front-end features a gate-modulated quadrature VCO for low phase noise and accurate quadrature phase signal generation. It merges the LNA, quadrature mixer, and quadrature VCO in a single current-reuse stacked topology that provides a conversion gain 42.5 dB with a power consumption of 1 mW. A continuous-time (CT) quadrature bandpass sigma-delta analog-to-digital converter (ADC) provides… CONTINUE READING
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