A Cordic-Based Reconfigrable Systolic Array Processor for MIMO-OFDM Wireless Communications

Abstract

A reconfigurable systolic array processor based on a coordinate rotation digital computer (CORDIC) algorithm is proposed for MIMO-OFDM baseband processing. With CORDIC, the processor provides high computation efficiency, and a multi-thread interleaving architecture offers the advantage of a simple data transfer mechanism. Also presented are an array mapping method for calculating MMSE filter coefficients and a comparison of the processor's performance with that of dedicated hardware. Despite its flexibility, the processor achieves a computational density of 57% that of dedicated hardware.

DOI: 10.1109/SIPS.2007.4387624

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Cite this paper

@article{Seki2007ACR, title={A Cordic-Based Reconfigrable Systolic Array Processor for MIMO-OFDM Wireless Communications}, author={Katsutoshi Seki and Tomoyoshi Kobori and James Okello and Masao Ikekawa}, journal={2007 IEEE Workshop on Signal Processing Systems}, year={2007}, pages={639-644} }