A Complexity-Effective Out-of-Order Retirement Microarchitecture

Abstract

Current superscalar processors commit instructions in program order by using a reorder buffer (ROB). The ROB provides support for speculation, precise exceptions, and register reclamation. However, committing instructions in program order may lead to significant performance degradation if a long latency operation blocks the ROB head. Several proposals have… (More)
DOI: 10.1109/TC.2009.95

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