A Compact Parallel (31,5)-Counter Circuit Based on Capacitive Threshold-Logic Gates

@article{Leblebici1995ACP,
  title={A Compact Parallel (31,5)-Counter Circuit Based on Capacitive Threshold-Logic Gates},
  author={Yusuf Leblebici and H. Ozdemir and Asım Kepkep and Ugur Çilingiroglu},
  journal={ESSCIRC '95: Twenty-first European Solid-State Circuits Conference},
  year={1995},
  pages={390-393}
}
A novel high-speed circuit implementation of the (31,5)-counter (i.e., the 31-bit data compressor) based on capacitive threshold logic (CTL) is presented. The circuit consists of 20 threshold logic gates arranged in two stages. The charge-based CTL gates are essentially dynamic circuits which require a periodic refresh or precharge cycle, but unlike conventional dynamic CMOS gates, the circuit can be operated in synchronous as well as in asynchronous mode. The compressor circuit is implemented… CONTINUE READING

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