A Compact FPGA Implementation of Triple-DES Encryption System with IP Core Generation and On-Chip Verification

@inproceedings{Ghosal2010ACF,
  title={A Compact FPGA Implementation of Triple-DES Encryption System with IP Core Generation and On-Chip Verification},
  author={Prasun Ghosal and Malabika Biswas and Manish Biswas},
  year={2010}
}
This paper presents a fast and compact FPGA based implementation of the Data Encryption Standard (DES) and Triple Data Encryption Standard (TDES) algorithm, widely used in cryptography for securing the Internet traffic. The main objective of this paper is to provide the reader with a deep insight of the theory and design of a digital cryptographic circuit, which was implemented in a Vertex 5 series (XCVLX5110T) target device with the use of VHDL as the hardware description language. In order to… CONTINUE READING
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