A Compact DSP Core with Static Floating-Point Arithmetic

@article{Lin2006ACD,
  title={A Compact DSP Core with Static Floating-Point Arithmetic},
  author={Tay-Jyi Lin and Hung-Yueh Lin and Chie-Min Chao and Chih-Wei Liu and Chih-Wei Jen},
  journal={VLSI Signal Processing},
  year={2006},
  volume={42},
  pages={127-138}
}
A multimedia system-on-a-chip (SoC) usually contains one or more programmable digital signal processors (DSP) to accelerate data-intensive computations. But most of these DSP cores are designed originally for standalone applications, and they must have some overlapped (and redundant) components with the host microprocessor. This paper presents a compact DSP for multi-core systems, which is fully programmable and has been optimized to execute a set of signal processing kernels very efficiently… CONTINUE READING
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