• Corpus ID: 11111003

A Case for Heterogeneous Flash

  title={A Case for Heterogeneous Flash},
  author={Di Wang and Anand Sivasubramaniam and Bhuvan Urgaonkar},
We explore the idea of heterogeneous NAND flash which possesses pages/blocks of multiple sizes. This heterogeneity can then be exploited to accommodate the diversity in data access patterns found in most storage workloads. We identify various trade-offs offered by such pages/blocks. By characterizing seven real-world I/O traces, we identify metrics that have a bearing on the efficacy as well as design of such a heterogeneous flash. We use the implications of our workload characterization to… 

Figures and Tables from this paper

CORE-Dedup: IO Extent Chunking based Deduplication using Content-Preserving Access Locality

It is shown that 4 KB fixed size chunking and IO extent based chunking use chunk index 14500 and 1700, respectively, while at multiple workload of 10 user’s compile in virtual machine the result shows that the deduplication rate account for 60.4% and 57.6% on fixed size andIO extent chunking, respectively.



Design Tradeoffs for SSD Performance

It is found that SSD performance and lifetime is highly workload-sensitive, and that complex systems problems that normally appear higher in the storage stack, or even in distributed systems, are relevant to device firmware.

Synthesizing Representative I/O Workloads for TPC-H

This paper presents a synthetic workload generator for TPC-H, an important decision-support commercial workload, by completely characterizing the arrival and access patterns of its queries, and presents a novel approach for parameterizing the behavior of inter-mingling streams of sequential requests to generate disk block-level traces.

Practical, transparent operating system support for superpages

This work proposes the design of an effective superpage management system for FreeBSD, and implements it in FreeBSD on the Alpha CPU, and evaluates it on real workloads and benchmarks.

A study of practical deduplication

We collected file system content data from 857 desktop computers at Microsoft over a span of 4 weeks. We analyzed the data to determine the relative efficacy of data deduplication, particularly

Scalable high performance main memory system using phase-change memory technology

This paper analyzes a PCM-based hybrid main memory system using an architecture level model of PCM and proposes simple organizational and management solutions of the hybrid memory that reduces the write traffic to PCM, boosting its lifetime from 3 years to 9.7 years.

A study of file sizes and functional lifetimes

The collection, analysis and interpretation of data pertaining to files in the computing environment of the Computer Science Department at Carnegie-Mellon University (CMU-CSD) is discussed.

A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications

A 1.8-V 2-Gb NAND flash memory has been successfully developed on a 90-nm CMOS STI process technology, resulting in a 141-mm/sup 2/ die size and a 0.044-/spl mu/m/sup 2/ effective cell. For the

Advances and Future Prospects of Spin-Transfer Torque Random Access Memory

The progress of the work on device design, material improvement, wafer processing, integration with CMOS, and testing for a demonstration STT-RAM test chip are reported, and projections based on modeling of the future characteristics of STt-RAM are projected.

The Google file system

NAND Flash-Based Disk Cache Using SLC/MLC Combined Flash Memory

An effective management scheme for heterogeneous SLC and MLC regions of combined flash memory is proposed and a design technique which is able to determine the optimal proportion between the two regions that maximizes performance and energy reduction is proposed, guaranteeing the lifespan constraint.