A Cache Architecture for Counting Bloom Filters

@article{Ahmadi2007ACA,
  title={A Cache Architecture for Counting Bloom Filters},
  author={M. Ahmadi and Stephan Wong},
  journal={2007 15th IEEE International Conference on Networks},
  year={2007},
  pages={218-223}
}
  • M. Ahmadi, Stephan Wong
  • Published 1 November 2007
  • Computer Science
  • 2007 15th IEEE International Conference on Networks
Within packet processing systems, lengthy memory accesses greatly reduce performance. To overcome this limitation, network processors utilize many different techniques, e.g., utilizing multi-level memory hierarchies, special hardware architectures, and hardware threading. In this paper, we introduce a multi-level memory hierarchy and a special hardware cache architecture for counting Bloom filters that is utilized by network processors and packet processing applications such as packet… 

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