A CMOS low-power low-offset and high-speed fully dynamic latched comparator

@article{Jeon2010ACL,
  title={A CMOS low-power low-offset and high-speed fully dynamic latched comparator},
  author={HeungJun Jeon and Yong-Bin Kim},
  journal={23rd IEEE International SOC Conference},
  year={2010},
  pages={285-288}
}
This paper presents a novel dynamic latched comparator that demonstrates lower offset voltage and higher load drivability than the conventional dynamic latched comparators. With two additional inverters inserted between the input- and output-stage of the conventional double-tail dynamic comparator, the gain preceding the regenerative latch stage is improved. The complementary version of the regenerative latch stage, which provides larger output drive current than the conventional one at a… CONTINUE READING
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