A CMOS imaging platform using single photon avalanche diode array in standard technology

@article{Hsu2017ACI,
  title={A CMOS imaging platform using single photon avalanche diode array in standard technology},
  author={Tzu-Hsiang Hsu and Chih-Cheng Hsieh},
  journal={2017 IEEE SENSORS},
  year={2017},
  pages={1-3}
}
A compact single-photon avalanche diode (SPAD) testing array fabricated in standard 0.18μm CMOS technology is presented. Four types of SPAD are designed in 18μm pixel pitch with 3μm active region and arranged in four 16×30 sub-arrays. The implemented column readout circuit consists of column-shared comparator and tunable hold-off time control circuit, which… CONTINUE READING