A CMOS adiabatic inverter operating with a single clock power supply to reduce non-adiabatic loss

Abstract

This paper presents the design of a low energy CMOS adiabatic inverter (Ib-driver). The proposed Ib-driver structure uses complementary input, output and a dual-rail structure. When implemented on a 0.13 mum CMOS 1.2 V technology, under the large capacitive loading condition, Ib-driver performs better than the reference adiabatic circuit (sk-driver) in… (More)
DOI: 10.1109/APCCAS.2008.4746185

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@article{Garca2008ACA, title={A CMOS adiabatic inverter operating with a single clock power supply to reduce non-adiabatic loss}, author={Jos{\'e} C. Garc{\'i}a and Juan A. Montiel-Nelson and Saeid Nooshabadi}, journal={APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems}, year={2008}, pages={968-971} }