A CMOS Analog Baseband for a 5GHzWLAN Direct- Conversion Receiver

Abstract

This paper describes a CMOS analog baseband circuits for directconversion receiver of5GHz IEEE 802.11a. The analog baseband consists of I/Q signal paths which have channel selection filter, programmable gain amplifier (PGA). An active-RC channel selection filter for WLAN is described whose cut-off frequency is tunable from 6MHz to 20MHz. For high linearity, the PGA is constructed with op-amp and resistor based inverting amplifiers. For minimum power consumption, the op-amps employ the current re-using feedforward frequency compensation. The input third-order intercept point (iIP3) is 20dBV at the highest gain mode. Implemented in a 0.18 m CMOS technology, the gain of the programmable gain amplifier (PGA) can be controlled from 2.5dB to 52.5dB with 0.5dB step.

Cite this paper

@inproceedings{Lee2014ACA, title={A CMOS Analog Baseband for a 5GHzWLAN Direct- Conversion Receiver}, author={Mi-Young Lee and Young-Hun Lee}, year={2014} }