A BiCMOS analog neural network with dynamically updated weights

@article{Morishita1990ABA,
  title={A BiCMOS analog neural network with dynamically updated weights},
  author={Tatsuo Morishita and Yukio Tamura and Taisuke Otsuki},
  journal={1990 37th IEEE International Conference on Solid-State Circuits},
  year={1990},
  pages={142-143}
}
A 64-neuron electrically trainable BiCMOS analog neuroprocessor based on three-layered PDP networks is described. The minimum feedforward propagation time is 10 mu s, equivalent to operation speed of 10/sup 8/ multiplications/s. Analog neuroprocessors with a storage capacitor for the synapse have been studied. The short retention time of the synapse weight has been an obstacle to the development of an analog neurochip. A dynamic refresh technique described here increases the retention time of… CONTINUE READING