A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/ oversampling ratio

@article{Fujimori2000A9S,
  title={A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/ oversampling ratio},
  author={Ichiro Fujimori and Luca Longo and Armond Hairapetian and K. Seiyama and S. Kosic and Jun Li Cao and Shu-Lap Chan},
  journal={IEEE Journal of Solid-State Circuits},
  year={2000},
  volume={35},
  pages={1820-1828}
}
A 16-b 2.5-MHz output-rate analog-to-digital converter (ADC) for wireline communications and high-speed instrumentation has been developed. A 2-1-1 cascaded delta-sigma modulator (DSM) employing 4-b quantizers in every stage makes all quantization noise sources negligible at 8/spl times/ oversampling ratio, Data weighted averaging with bi-directional rotation eliminates tones generated by multibit digital-to-analog converter (DAC) nonlinearity to increase the spurious-free dynamic-range (SFDR… CONTINUE READING
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