A 9.2–12GHz, 90nm digital fractional-N synthesizer with stochastic TDC calibration and −35/−41dBc integrated phase noise in the 5/2.5GHz bands

Abstract

A 90nm CMOS, 9.2–12GHz digital fractional-N synthesizer for WLAN/WiMax is described. Stochastic calibration of time to digital conversion and a VCO phase noise minimization algorithm are used to achieve <−35dBc integrated phase nose (100Hz to 10MHz), in the 5–6GHz band with spurs below −60dBc. 

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