A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW

@article{Kauffman2014A7D,
  title={A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW},
  author={John G. Kauffman and Pascal Witte and Matthias Lehmann and Joachim Becker and Yiannos Manoli and Maurits Ortmanns},
  journal={IEEE Journal of Solid-State Circuits},
  year={2014},
  volume={49},
  pages={392-404}
}
This paper presents a single loop, third order continuous time ΔΣ modulator with an internal 4 bit quantizer sampled at 500 MHz with only an oversampling ratio of 10. Since multi-bit operation commonly suffers from DAC non-linearities, and dynamic element matching is ineffective at low oversampling, an alternative auxiliary DAC linearization is proposed for ΔΣ modulators. The unit element mismatches are digitally estimated based on a cross correlation of a binary test signal with the modulator… CONTINUE READING
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ADC Performance Survey 1997–2011

  • B. Murmann
  • http://www.stanford.edu/~murmann/adcsurvey.html
  • 2011
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4 Excerpts

A 72 dB-DR CT modulator using digitally estimated auxiliary DAC linearization achieving 88 fJ/conv in a 25 MHz BW

  • P. Witte, J. Kauffman, J. Becker, Y. Manoli, M. Ortmanns
  • Proc. IEEE Int. Solid-State Circuits Conf., ISSCC…
  • 2012
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A 72 dB - DR CT modulator using digitally estimated auxiliary DAC linearization achieving 88 fJ / conv in a 25 MHz BW , ” in

  • J. Becker, Y. Manoli, M. Ortmanns
  • IEEE J . Solid - State Circuits
  • 2011

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