A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance

@article{Siddiqui2018A7D,
  title={A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance},
  author={M. Sultan M. Siddiqui and Sumit Srivastav and Dattatray Ramrao Wanjul and Manankumar Suthar and Sudhir Kumar},
  journal={2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID)},
  year={2018},
  pages={266-270}
}
Two read-write 8T dual port static random accessmemories (SRAMs) suffer write disturb issue when both of its ports are accessed simultaneously. Write disturb is detrimental at low voltages in deep submicron technologies due to increased variations. This paper proposes a duplicated inter-port write data to mitigate write disturb in dual port SRAM design… CONTINUE READING