A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS

@article{Pellerano2007A66,
  title={A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS},
  author={Stefano Pellerano and Yorgos Palaskas and Krishnamurthy Soumyanath},
  journal={ESSCIRC 2007 - 33rd European Solid-State Circuits Conference},
  year={2007},
  pages={352-355}
}
This paper presents an integrated LNA for mm-wave applications implemented in 90 nm CMOS technology. Modeling methodology based solely on electromagnetic simulations, RC parasitic extraction and device measurements up to 20 GHz allows for "correct-by-construction" design at mm-wave frequency and first-pass silicon success. The dual-stage cascode LNA has a peak gain of 15.5 dB at 64 GHz with an NF of 6.5 dB, while drawing 26 mA per stage from 1.65 V. Output P1dB is 3.8 dBm. At VDD = 1.26 V, each… CONTINUE READING
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