A 64 fJ/step 9-bit SAR ADC Array With Forward Error Correction and Mixed-Signal CDS for CMOS Image Sensors

@article{Chen2014A6F,
  title={A 64 fJ/step 9-bit SAR ADC Array With Forward Error Correction and Mixed-Signal CDS for CMOS Image Sensors},
  author={Denis Guangyin Chen and Fang Tang and Man Kay Law and Xiaopeng Zhong and Amine Bermak},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2014},
  volume={61},
  pages={3085-3093}
}
A 9 b Successive-Approximation-Register (SAR) Anglog-to-Digital Converter (ADC) with pilot-Digital-to-Analog Converter (pDAC) technique for image sensor applications is described in this paper. Its Forward Error Correction (FEC) improves its robustness against device mismatch. It performs mixed-signal Correlated-Double-Sampling (CDS) using only the ADC's built-in capacitor array without any additional amplifier or memory. The ADC measures 490μm×7.4μm and is demonstrated in a low-power CMOS… CONTINUE READING
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