A 52.4mW 3D Graphics Processor with 141Mvertices/s Vertex Shader and 3 Power Domains of Dynamic Voltage and Frequency Scaling

@article{Nam2007A53,
  title={A 52.4mW 3D Graphics Processor with 141Mvertices/s Vertex Shader and 3 Power Domains of Dynamic Voltage and Frequency Scaling},
  author={Byeong-Gyu Nam and Jeabin Lee and Kwanho Kim and Seungjin Lee and Hoi-Jun Yoo},
  journal={2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers},
  year={2007},
  pages={278-603}
}
A 3D graphics processor fabricated using 0.18mum 6M CMOS contains 1.57M transistors and 29kB SRAM in a core size of 17.2mm2. The vertex shader utilizes a logarithmic number system for 141 Mvertices/s and the 3 power domains are controlled separately by dynamic voltage and frequency scaling for 52.4mW at 60fps. 
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