A 50 Gb/s TIA in 0.25µm SiGe:C BiCMOS in folded cascode architecture with pnp HBTs

@article{Lopez2016A5G,
  title={A 50 Gb/s TIA in 0.25µm SiGe:C BiCMOS in folded cascode architecture with pnp HBTs},
  author={Iria Garcia Lopez and Pedro Rito and Ahmed Awny and Bernd Heinemann and Dietmar Kissinger and A. Cagri Ulusoy},
  journal={2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)},
  year={2016},
  pages={9-12}
}
This paper presents the design and electrical characterization of a transimpedance amplifier (TIA) implemented in a complementary 0.25 μm SiGe:C BiCMOS technology which offers a fT/fmax of 110 GHz/180 GHz for the npn and 95 GHz/140 GHz for the pnp transistor, respectively. Featuring folded cascode architecture by making use of the available pnp HBTs, the… CONTINUE READING