A 433 MHz 64 b quad issue RISC microprocessor

@article{Gronowski1996A4M,
  title={A 433 MHz 64 b quad issue RISC microprocessor},
  author={P. E. Gronowski and P. Bannon and R. Blake-Campos and G. Bouchard and W. Bowhill and D. Carlson and R. Castelino and D. R. Donchin and R. M. Fromm and M. K. Gowan and A. K. Jain and B. J. Loughlin and S. Mehta and J. Meyer and R. Mueller and A. Olesin and T. Pham and R. P. Preston and P. I. Rubinfeld},
  journal={1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC},
  year={1996},
  pages={222-223}
}
  • P.E. Gronowski, P. Bannon, +16 authors P.I. Rubinfeld
  • Published 1996
  • Computer Science
  • 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC
  • This 9.6 M transistor quad-issue RISC microprocessor achieves greater than 500 SPECint92 (estimated) at 433 MHz. The die measures 14.5/spl times/14.4 mm/sup 2/ fabricated in a 0.35 /spl mu/m CMOS process. The chip uses split-power supplies; the core operates at 2.0 V and the external interface at 3.3 V. The chip dissipates less than 25 W. 
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