A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech Recognition

Abstract

We have developed a low-power VLSI chip for 60-kWord real-time continuous speech recognition based on a context-dependent hidden Markov model (HMM). Our implementation includes a cache architecture using locality of speech recognition, beam pruning using a dynamic threshold, two-stage language model searching, highly parallel Gaussian mixture model (GMM… (More)
DOI: 10.1109/ASPDAC.2013.6509561

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