A 33-dBm 1.9-GHz silicon-on-insulator CMOS stacked-FET power amplifier

@article{Pornpromlikit2009A31,
  title={A 33-dBm 1.9-GHz silicon-on-insulator CMOS stacked-FET power amplifier},
  author={Sataporn Pornpromlikit and Jinho Jeong and Calogero D. Presti and Antonino Scuderi and Peter M. Asbeck},
  journal={2009 IEEE MTT-S International Microwave Symposium Digest},
  year={2009},
  pages={533-536}
}
A single-stage stacked-FET power amplifier (PA) is demonstrated using a 0.28-µm silicon-on-insulator (SOI) CMOS technology. To overcome the low breakdown voltage limit of MOSFETs, a stacked-FET structure is employed, where four transistors are connected in series so that their output voltage swings are added in phase. The stacked-FET PA has been designed to withstand up to 9 V of supply voltage before reaching its breakdown limit. The measurement results show that, with a 6.5-V supply, the PA… CONTINUE READING