A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging

  title={A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging},
  author={J. Richardson and R. Walker and L. Grant and D. Stoppa and F. Borghetti and E. Charbon and M. Gersbach and R. Henderson},
  journal={2009 IEEE Custom Integrated Circuits Conference},
We report the design and characterisation of a 32×32 time to digital (TDC) converter plus single photon avalanche diode (SPAD) pixel array implemented in a 130nm imaging process. Based on a gated ring oscillator approach, the 10 bit, 50µm pitch TDC array exhibits a minimum time resolution of 50ps, with accuracy of ±0.5 LSB DNL and 2.4 LSB INL. Process, voltage and temperature compensation (PVT) is achieved by locking the array to a stable external clock. The resulting time correlated pixel… Expand
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