A 3.3 V 10 b 25 Msample/s two-step ADC in 0.35 /spl mu/m CMOS

Abstract

System-on-chip for video, QAM and VSB applications requires analog-to-digital converters (ADC) in state-of-the-art CMOS technology. The untrimmed ADC is realized in standard single poly 0.35 /spl mu/m CMOS technology with 3.3 V supply voltage, dissipates 195 mW and measures 0.8 mm/sup 2/, including track-and-hold and clock-generation circuits. This ADC… (More)

Topics

  • Presentations referencing similar topics