A 3-ps dead-zone double-edge-checking phase-frequency-detector with 4.78 GHz operating frequencies

@article{Chou2004A3D,
  title={A 3-ps dead-zone double-edge-checking phase-frequency-detector with 4.78 GHz operating frequencies},
  author={Chien-Ping Chou and Zhi-Ming Lin and Jun-Da Chen},
  journal={The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.},
  year={2004},
  volume={2},
  pages={937-940 vol.2}
}
This work proposes a double-edge-checking phase frequency detector (dec-PFD), designed in 0.35-/spl mu/m CMOS process with 3-V supply voltage. Consisting of four-states without feedback paths, the dec-PFD can avoid U/sub p/ and D/sub OWN/ signals from rising to high at the same time and thus solve current mismatch problem with 3-ps dead-zone in the phase detection. The maximum operating frequency of the PFD is 4.78 GHz. Simulated results are presented to demonstrate the capability of phase… CONTINUE READING
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