A 25-nm gate-length FinFET transistor module for 32nm node

  title={A 25-nm gate-length FinFET transistor module for 32nm node},
  author={Chang-Yun Chang and Tsung-Lin Lee and Clement H. J. Wann and Li-Shyue Lai and H. H. Chen and C. S. Yeh and Chih-Sheng Chang and C. Y. Ho and Jyh-Cherng Sheu and T. Kwok and Feng Yuan and S Yu and Chia-Feng Hu and Jeng-Jung Shen and Yi-Hsuan Liu and C. S. Chen and S. Y. Chen and L. Chen and Y. Stephen Chiu and Chu-Yun Fu and Ming-Jie Huang and Yu-Lien Huang and Shih-Ting Hung and Jhon-Jhy Liaw and Hsien-Chin Lin and Hsien-Hsin Lin and L. -T. S. Lin and Shyue-Shyh Lin and Yuh-Jier Mii and E. Ou-Yang and Ming-Feng Shieh and C. Y. Su and Shih-Peng Tai and Hun-Jan Tao and M. C. Tsai and Kai-Ting Tseng and Kin-Weng Wang and Shiang-Bau Wang and Jeff J. Xu and Fu-Kai Yang and S. Yang and Chen-Nan Yeh},
  journal={2009 IEEE International Electron Devices Meeting (IEDM)},
FinFET is the most promising double-gate transistor architecture [1] to extend scaling over planar device. We present a high-performance and low-power FinFET module at 25 nm gate length. When normalized to the actual fin perimeter, N-FinFET and P-FinFET have 1200 and 915 µA/µm drive current respectively at 100nA/µm leakage under 1V. To our knowledge this is the best FinFET drive current at such scaled gate length. This scaled gate length enables this FinFET transistor for 32nm node insertion… CONTINUE READING
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ION-IOFF characteristics for N-FinFET. ION is 1200μA/μm at IOFF =100 nA/μm and VDD=1V

  • A. Kaneko et
  • IEDM
  • 2006
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