A 25-MS/s 14-b 200-mW /spl Sigma//spl Delta/ Modulator in 0.18-/spl mu/m CMOS

@article{Balmelli2004A21,
  title={A 25-MS/s 14-b 200-mW /spl Sigma//spl Delta/ Modulator in 0.18-/spl mu/m CMOS},
  author={Pio Balmelli and Qiuting Huang},
  journal={2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)},
  year={2004},
  pages={74-514 Vol.1}
}
The design of a fifth-order 4-b quantizer single-loop /spl Sigma//spl Delta/ modulator is presented that achieves 25-MS/s conversion rate with 84 dB of dynamic range and 82 dB of signal-to-noise ratio. Implemented in a 0.18-/spl mu/m CMOS technology, the 0.95-mm/sup 2/ chip has a power consumption of 200 mW from a 1.8-V supply. 
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