A 24GS/s 5-b ADC with closed-loop THA in 0.18μm SiGe BiCMOS

@article{Lee2008A25,
  title={A 24GS/s 5-b ADC with closed-loop THA in 0.18μm SiGe BiCMOS},
  author={Jaesik Lee and Joseph Weiner and Pascal Roux and Andreas Leven and Young-Kai Chen},
  journal={2008 IEEE Custom Integrated Circuits Conference},
  year={2008},
  pages={313-316}
}
A 5-b flash ADC with a closed-loop THA is implemented in 0.18-mum SiGe BiCMOS. A global shunt feedback THA and a current-weighted comparator allow the ADC to achieve wide resolution bandwidth of 6.5 GHz and high sampling rate up to 24 GS/s. The ADC shows an SNDR of 28 dB and an SFDR of 36 dB with a 1 GHz input sampled at 16 GS/s. It consumes 3.3 W from 3.6/3-V supplies and occupies 8.68 mm2 silicon area. 

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