A 223Mbps FPGA Implementation of (10240, 5120) Irregular Structured Low Density Parity Check Decoder

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@inproceedings{Wang2008A2F, title={A 223Mbps FPGA Implementation of (10240, 5120) Irregular Structured Low Density Parity Check Decoder}, author={Wenjun Wang and Xiaoguang Wu and Xiaoxuan Zhu and Guixia Kang and Xiaofeng Tao}, booktitle={VTC Spring}, year={2008} }