A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency


A 2.6pJ/Inst subthreshold sensor processor designed for energy efficiency has been fabricated. A two-stage micro-architecture was implemented to mitigate the impact of process variation in subthreshold operation. Careful library cell selection and robust SRAM design enabled fully functional operation from 1.2V to 200mV. We analyze the variation in frequency… (More)


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@article{Zhai2006A2S, title={A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency}, author={Bo Zhai and Leyla Nazhandali and J. Olson and Anthony P. Reeves and Marco Minuth and Robert F Helfand and Sanjay Pant and Duane Blaauw and Thomas Austin}, journal={2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.}, year={2006}, pages={154-155} }