A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-/spl mu/m CMOS technology

  title={A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-/spl mu/m CMOS technology},
  author={C. Lam and B.. Razavi},
  journal={1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326)},
  • C. Lam, B.. Razavi
  • Published 1999 in
    1999 Symposium on VLSI Circuits. Digest of Papers…
This paper describes the design of a CMOS frequency synthesizer targeting wireless local area network applications in the 5 GHz range. Based on an integer-N architecture, the synthesizer produces a 5.2 GHz output as well as the quadrature phases of a 2.6 GHz carrier. Fabricated in a 0.4 /spl mu/m digital CMOS technology, the circuit provides a channel spacing of 23 MHz at 5.2 GHz while exhibiting a phase noise of -115 dBc/Hz at 2.6 GHz and -100 dBc/Hz at 5.2 GHz at 10 MHz offset. The reference… CONTINUE READING


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Publications referenced by this paper.

A fully integrated CMOS DCS-1800 frequency synthesizer

1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156) • 1998

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