A 2 Gb/s/pin 4-PAM parallel bus interface with transmit crosstalk cancellation, equalization, and integrating receivers

@article{Zerbe2001A2G,
  title={A 2 Gb/s/pin 4-PAM parallel bus interface with transmit crosstalk cancellation, equalization, and integrating receivers},
  author={J. Zerbe and P. Chau and C. Werner and W. F. Stonecypher and H. J. Liaw and Gong Jong Yeh and T. Thrush and S. A. Best and K M Donnelly},
  journal={2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)},
  year={2001},
  pages={66-67}
}
A 2 Gb/s/pin single-ended 4-PAM parallel bus interface uses transmit crosstalk cancellation and equalization techniques as well as integrating data receivers to improve system margin in low-cost packaging despite inherent coupling noise and data distortion.