A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks

@article{Roux2010A1R,
  title={A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks},
  author={Erwan Le Roux and Nicola Scolari and Budhaditya Banerjee and Claude Arm and Patrick Volet and Daniel Sigg and Pascal Heim and Jean-F{\'e}lix Perotto and François Kaess and Nicolas Raemy and Alexandre Vouilloz and David Ruffieux and Matteo Contaldo and Fr{\'e}d{\'e}ric Giroud and Daniel S{\'e}verac and Marc-Nicolas Morgan and Steve Gyger and Cedric Monneron and Thanh-Chau Le and Cesar Henzelin and Vincent Peiris},
  journal={2010 IEEE International Solid-State Circuits Conference - (ISSCC)},
  year={2010},
  pages={464-465}
}
A 150¿A/MHz DSP with two MAC/cycle instructions is integrated with a configurable 863-to-928MHz RF transceiver that yields 3.5mW in continuous reception, 2¿C per channel sampling and 40mW for 10dBm output. The SoC includes voltage converters that allow 1.0-to-1.8V or 2.7-to-3.6V primary voltage supplies. In sleep mode, it consumes 1¿A with a 32kHz crystal-based RTC running. 
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