A 160-GHz three-stage fully-differential amplifier in 40-nm CMOS

Abstract

This paper presents a 160-GHz fully-differential power amplifier in 40-nm CMOS. A tapered gate-connection network was optimized which results in a reduction of the gate resistance and allows to achieve a maximum gain of 11.6 dB with a 3-dB bandwidth of 24 GHz from the three-stage amplifier. The measured saturated output power is 4.1 dBm and the measured 1… (More)
DOI: 10.1109/ICECS.2014.7049942

Topics

10 Figures and Tables

Statistics

0204020162017
Citations per Year

Citation Velocity: 10

Averaging 10 citations per year over the last 2 years.

Learn more about how we calculate this metric in our FAQ.

Slides referencing similar topics