A 12b 500MS/s DAC with >70dB SFDR up to 120MHz in 0.18μm CMOS

  title={A 12b 500MS/s DAC with >70dB SFDR up to 120MHz in 0.18μm CMOS},
  author={Konstantinos Doris and J. Briaire and D. M. W. Leenaerts and M. Vertreg and Arthur H. M. van Roermund},
  journal={ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.},
  pages={116-588 Vol. 1}
A CMOS current steering 12b 500MS/s 216mW DAC without any additional circuitry to remove errors introduced during the conversion process has >70dB SFDR up to 120MHz above the Nyquist band. This is comparable to state-of-the-art performance requiring additional circuitry, and better than any design without additional circuitry 
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High-speed D/A Converters: from Analysis and Synthesis Concepts to IC Implementation,

  • K. Doris
  • Ph.D. Thesis,
  • 2004
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