A 12–b 600 ks/s Digitally Self-Calibrated Pipelined Algorithmic ADC

Abstract

This paper discusses fully digitat error correction and self-calibration which correct errors due to capacitor mismatch, charge injection, and comparator offsets in algorithmic A/D converters. The calibration is performed without any additional analog circuitry, and the conversion does not need extra clock cycles. This technique can be applied to… (More)

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@inproceedings{LeeA16, title={A 12–b 600 ks/s Digitally Self-Calibrated Pipelined Algorithmic ADC}, author={Hae-Seung Lee} }