A 100-mW 4/spl times/10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects

@article{Kromer2005A14,
  title={A 100-mW 4/spl times/10 Gb/s transceiver in 80-nm CMOS for high-density optical interconnects},
  author={Christian Kromer and G. Sialm and Cindy Berger and Thomas Morf and M. Schmatz and Frank Ellinger and Daniel Erni and G. L. Bona and Heinz Jackel},
  journal={IEEE Journal of Solid-State Circuits},
  year={2005},
  volume={40},
  pages={2667-2679}
}
This paper describes a quad optical transceiver for low-power high-density short-distance optical data communication. Each channel transmits 10 Gb/s over a multimode (MM) fiber and features a link margin of 5.2 dB at a bit error rate (BER) of 10/sup -12/. The transmit and receive amplifying circuits are implemented in an 80-nm digital CMOS process. Each driver consumes 2 mW from a 0.8-V supply, and each vertical cavity surface-emitting laser (VCSEL) requires 7 mA from a 2.4-V supply. The… CONTINUE READING
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