A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract)

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@inproceedings{Jefferson1998A1M, title={A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract)}, author={David Jefferson and Srinivas Reddy and Christopher Lane and Ninh Ngo and Wanli Chang and Manuel Mijia and Ketan Zaveri and Cameron McClintock and Richard Cliff}, booktitle={FPGA}, year={1998} }