A 10.3-GS/s, 6-Bit Flash ADC for 10G Ethernet Applications

  title={A 10.3-GS/s, 6-Bit Flash ADC for 10G Ethernet Applications},
  author={Aida Varzaghani and Athos Kasapi and Dimitri Loizos and Song-Hee Paik and Shwetabh Verma and Sotirios Zogopoulos and Stefanos Sidiropoulos},
  journal={IEEE Journal of Solid-State Circuits},
This paper presents the design of a 40-nm CMOS 10.3-GS/s 6-bit Flash ADC used as the analog frontend of a universal DSP-based receiver that meets the requirements for all the NRZ 10G Ethernet (10GE) standards, for both fiber and copper channels. The 4-way interleaved ADC consists of a pair of frontend variable gain amplifiers (VGAs) driving four sets of track-and-hold (T/H) switches, followed by fine VGAs that drive 6-bit comparator arrays. A Wallace-tree adder is utilized as the thermometer-to… CONTINUE READING
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