A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure

@article{Liu2010A15,
  title={A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure},
  author={Chun-Cheng Liu and S. Chang and Guan-Ying Huang and Ying-Zu Lin},
  journal={IEEE Journal of Solid-State Circuits},
  year={2010},
  volume={45},
  pages={731-740}
}
  • Chun-Cheng Liu, S. Chang, +1 author Ying-Zu Lin
  • Published 2010
  • Physics, Computer Science
  • IEEE Journal of Solid-State Circuits
  • This paper presents a low-power 10-bit 50-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) that uses a monotonic capacitor switching procedure. Compared to converters that use the conventional procedure, the average switching energy and total capacitance are reduced by about 81% and 50%, respectively. In the switching procedure, the input common-mode voltage gradually converges to ground. An improved comparator diminishes the signal-dependent offset caused by the… CONTINUE READING
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    References

    SHOWING 1-10 OF 25 REFERENCES
    500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC
    • 294
    • PDF
    A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process
    • 88
    • PDF
    A 8-bit 500-KS/s low power SAR ADC for bio-medical applications
    • 150
    A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization
    • Wenbo Liu, Yuchun Chang, +6 authors Yun Chiu
    • Engineering, Computer Science
    • 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers
    • 2009
    • 78
    A 6-bit 600-MS/s 5.3-mW Asynchronous ADC in 0.13-$\mu{\hbox{m}}$ CMOS
    • 229
    An 8-bit 200-MSample/s Pipelined ADC With Mixed-Mode Front-End S/H Circuit
    • 52
    1-V 9-bit pipelined switched-opamp ADC
    • 151
    • Highly Influential
    A 1.35 GS/s, 10 b, 175 mW Time-Interleaved AD Converter in 0.13 µm CMOS
    • 145
    • PDF
    A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS
    • J. Craninckx, G. V. D. Plas
    • Engineering, Computer Science
    • 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers
    • 2007
    • 285
    • Highly Influential