A 10-bit 40MS/s Successive Approximation Register A/D Converter


A 10 bit, 40MS/s successive approximation register is presented in this paper. The whole structure consists of a fully-differential capacitor array along with a comparator and SAR control logic. The total power consumption is 35mW. Introduction Compared with other popular types of ADC architecture, successive approximation register (SAR) ADC provides… (More)


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