Highly Influential

A 10 bit, 40MS/s successive approximation register is presented in this paper. The whole structure consists of a fully-differential capacitor array along with a comparator and SAR control logic. The total power consumption is 35mW. Introduction Compared with other popular types of ADC architecture, successive approximation register (SAR) ADC provides… (More)

- Successive approximation ADC
- Digital comparator
- Flip-flop (electronics)
- ANSI escape code
- Capacitor Device Component
- Systems architecture
- Power supply
- Converter Device Component
- Comparator Device Component
- Approximation
- antineoplaston A10
- Sampling (signal processing)
- Algorithm
- CMOS
- Differential signaling
- Power inverter
- Transistor
- Most significant bit
- FLOPS
- Diagram
- Dummy variable (statistics)
- Telephone exchange
- Network switch
- Vehicle identification number
- Conceptual system