A 10–Bit 1.6-GS/s 27-mW Current-Steering D/A Converter With 550-MHz 54-dB SFDR Bandwidth in 130-nm CMOS

@article{Palmers2010A11,
  title={A 10–Bit 1.6-GS/s 27-mW Current-Steering D/A Converter With 550-MHz 54-dB SFDR Bandwidth in 130-nm CMOS},
  author={Pieter Palmers and Michiel S. J. Steyaert},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2010},
  volume={57},
  pages={2870-2879}
}
This paper presents a 10-bit 5-5 segmented current- steering digital-to-analog converter implemented in a standard 130-nm CMOS technology. It achieves full-Nyquist performance up to 1 GS/s and maintains 54-dB SFDR over a 550-MHz output bandwidth up to 1.6 GS/s. The power consumption for a near-Nyquist output signal sampled at 1.6 GS/s equals 27 mW. To enable the presented performance a design strategy is proposed that introduces a switch-driver power consumption aware analysis of the switched… CONTINUE READING
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