A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking

  title={A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking},
  author={Jung-Sik Kim and Chi Sung Oh and Hocheol Lee and Donghyuk Lee and Hyong-Ryol Hwang and Sooman Hwang and Byongwook Na and Joungwook Moon and Jin-Guk Kim and Hanna Park and Jang-Woo Ryu and Kiwon Park and Sanghee Kang and So-Young Kim and Hoyoung Kim and Jong-Min Bang and Hyunyoon Cho and Minsoo Jang and Cheolmin Han and Jung-Bae Lee and Kyehyun Kyung and Joo-Sun Choi and Young-Hyun Jun},
  journal={2011 IEEE International Solid-State Circuits Conference},
  • Jung-Sik Kim, C. Oh, +20 authors Y. Jun
  • Published 2011
  • Computer Science
  • 2011 IEEE International Solid-State Circuits Conference
Mobile DRAM is widely employed in portable electronic devices due to its feature of low power consumption. Recently, as the market trend renders integration of various features in one chip, mobile DRAM is required to have not only low power consumption but also high capacity and high speed. To attain these goals in mobile DRAM, we designed a 1Gb single data rate (SDR) Wide-I/O mobile SDRAM with 4 channels and 512 DQ pins, featuring 12.8GB/s data bandwidth. 
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