A 1.2 GHz Alpha microprocessor with 44.8 GB/s chip pin bandwidth

@article{Jain2001A1G,
  title={A 1.2 GHz Alpha microprocessor with 44.8 GB/s chip pin bandwidth},
  author={A. Jain and W. Anderson and T. Benninghoff and D. Berucci and M. Braganza and J. Burnetie and T. Chang and J. Eble and R. Faber and O. Gowda and J. Grodstein and G. Hess and J. Kowaleski and A. Kumar and B. Miller and Reiner M{\"u}ller and P. Paul and J. Pickholtz and S. Russell and M. Shen and T. Truex and A. Vardharajan and D. Xanthopoulos and T. Zou},
  journal={2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)},
  year={2001},
  pages={240-241}
}
  • A. Jain, W. Anderson, +21 authors T. Zou
  • Published 2001
  • Computer Science
  • 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)
A 4th-generation Alpha microprocessor running at 1.2 GHz delivers up to 44.8 GB/s chip pin bandwidth and dissipates 125 W at 1.5 V. It contains a 1.75 MB 2nd level write-back-cache, two memory controllers supporting 8 Rambus/sup TM/ channels running at 800 Mb/s, four 6.4 GB/s inter-processor communication ports, and a separate 10 port capable of 6.4 GB/s. The chip measures 21.1/spl times/18.8 mm/sup 2/, contains 130 M transistors and is fabricated in a 0.18 /spl mu/m bulk CMOS process with 7… Expand
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References

SHOWING 1-3 OF 3 REFERENCES
A 600 MHz superscalar RISC microprocessor with out-of-order execution
  • B. Gieseke, R. Allmon, +18 authors K. Wilcox
  • Computer Science
  • 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers
  • 1997
  • 196
The design and analysis of the clock distribution network for a 1.2 GHz Alpha microprocessor
  • 87
Clocking design and analysis for a 600 MHz Alpha microprocessor
  • H. Fair, D. Bailey
  • Computer Science
  • 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)
  • 1998
  • 204
  • PDF