A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application

@article{Mutoh1996A1V,
  title={A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application},
  author={Shin'ichiro Mutoh and Satoshi Shigematsu and Yasuyuki Matsuya and H. Fukuda and Junzo Yamada},
  journal={1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC},
  year={1996},
  pages={168-169}
}
  • S. Mutoh, S. Shigematsu, J. Yamada
  • Published 8 February 1996
  • Computer Science
  • 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC
A low-power digital signal processor (DSP) is the key component for battery-driven mobile phone equipment since a vast amount of data needs to be processed for multimedia use. Reduced supply voltage is a direct approach to power reduction. This 1 V DSPLSI with 26 MOPS and 1.1 mW/MOPS performance adopts a multi-threshold-voltage CMOS (MTCMOS) technique. A small embedded power-management processor decreases power during waiting periods. 

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