A 1 V 88 dB 20 kHz /spl Sigma//spl Delta/ modulator in 90 nm CMOS

  title={A 1 V 88 dB 20 kHz /spl Sigma//spl Delta/ modulator in 90 nm CMOS},
  author={Libin Yao and Michiel S. J. Steyaert and Willy M. C. Sansen},
  journal={2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)},
  pages={80-514 Vol.1}
A third-order single-loop SC /spl Sigma//spl Delta/ modulator is realized in a standard 90 nm digital CMOS technology. The modulator achieves 88 dB dynamic range for a 20 kHz signal bandwidth with an OSR of 100. Power consumption is 140 /spl mu/W from a 1 V supply, and the chip core size is 0.18 mm/sup 2/. 
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Optimal Parameters for Delta-Sigma Modulator Topologies,

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